Computing Symbolic Expressions in Analog Circuits Using Nullors
A novel method is introduced to compute symbolic expressions in analog circuits modeled by nullors. The proposed method is based on the formulation of a compact system of equations (CSEs) by manipulation of data-structures, which highly improves traditional symbolic-methods. It is demonstrated that by modeling all active devices using nullors, the CSEs is easily formulated by manipulation of both the nullor and admittance interconnection-relationships. Several examples leads us to conclude on the suitability of the proposed symbolic-method to be incorporated within a symbolic simulator.
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| Main Authors: | , , |
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| Format: | Digital revista |
| Language: | English |
| Published: |
Instituto Politécnico Nacional, Centro de Investigación en Computación
2005
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| Online Access: | http://www.scielo.org.mx/scielo.php?script=sci_arttext&pid=S1405-55462005000400004 |
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