Correct Hardware Design and Verification Methods [electronic resource] : IFIPWG10.2 Advanced Research Working Conference, CHARME'93 Arles France May 24–26, 1993 Proceedings /

These proceedings contain the papers presented at the Advanced Research Working Conference on Correct Hardware Design Methodologies, held in Arles, France, in May 1993, and organized by the ESPRIT Working Group 6018 CHARME-2and the Universit de Provence, Marseille, in cooperation with IFIP Working Group 10.2. Formal verification is emerging as a plausible alternative to exhaustive simulation for establishing correct digital hardware designs. The validation of functional and timing behavior is a major bottleneck in current VLSI design systems, slowing the arrival of products in the marketplace with its associated increase in cost. From being a predominantly academic area of study until a few years ago, formal design and verification techniques are now beginning to migrate into industrial use. As we are now witnessing an increase in activity in this area in both academia and industry, the aim of this working conference was to bring together researchers and users from both communities.

Bibliographic Details

Main Authors:	Milne, George J. editor., Pierre, Laurence. editor., SpringerLink (Online service)
Format:	Texto biblioteca
Language:	eng
Published:	Berlin, Heidelberg : Springer Berlin Heidelberg, 1993
Subjects:	Computer science., Computer hardware., Microprogramming., Arithmetic and logic units, Computer., Computer memory systems., Input-output equipment (Computers)., Computers., Computer Science., Theory of Computation., Computer Hardware., Control Structures and Microprogramming., Arithmetic and Logic Structures., Memory Structures., Input/Output and Data Communications.,
Online Access:	http://dx.doi.org/10.1007/BFb0021709
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